06/06/2024
Job Opening!!
Role: ASIC RTL
Experience: 5-15 Yrs.
Primary need is PHY+HBM3 Integration
Zebu Emulation and Validation:
4-10 years:
1 A good understanding of architectural aspects and RTL code at IP/Sub-system/SoC level
2) A good understanding of verification methodologies including SV-UVM/C based environment, transactors etc
3) Experience in building emulation models from scratch
4) Knowledge of Arm CPU cores, protocols including PCIe, USB, Ethernet, AMBA, UART/SPI/I2C, DDR, flash memories and their usage in SoC environments is necessary
5) Emulation experience on ZeBu/Veloce/Palladium, including compilation, test ex*****on, debug, and performance.
6) Strong scripting skills including UNIX shell scripting, Perl, TCL etc
7) Support various emulation users
8 ) Must have worked in end-to-end Emulation of atleast 1-2 SoC programs in Sub-system and chip level
Interested can share CV to:
[email protected]
